AT90CAN32-16MU Atmel, AT90CAN32-16MU Datasheet - Page 333

IC MCU AVR 32K FLASH 64-QFN

AT90CAN32-16MU

Manufacturer Part Number
AT90CAN32-16MU
Description
IC MCU AVR 32K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN32-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Operating Supply Voltage
0.5 V to 0.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
Package
64QFN EP
Family Name
90C
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90CAN32-16MU
Manufacturer:
ATMEL
Quantity:
717
7679H–CAN–08/08
Rdloop:
Return:
Do_spm:
Wait_spm:
Wait_ee:
sbci ZH, high(PAGESIZEB)
ldi
call Do_spm
; re-enable the RWW section
ldi
call Do_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
sbci YH, high(PAGESIZEB)
lpm
ld
cpse r0, r1
jmp
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
in
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
call Do_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcsrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
spmcsrval, (1<<PGWRT) | (1<<SPMEN)
spmcsrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Z+
r1, Y+
Error
temp1, SPMCSR
spmcsrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCSR
temp2, SREG
SPMCSR, spmcsrval
SREG, temp2
; If RWWSB is set, the RWW section is not ready yet
;not required for PAGESIZEB<=256
;init loop variable
;not required for PAGESIZEB<=256
;restore pointer
;use subi for PAGESIZEB<=256
AT90CAN32/64/128
333

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