AT90CAN32-16MU Atmel, AT90CAN32-16MU Datasheet - Page 335

IC MCU AVR 32K FLASH 64-QFN

AT90CAN32-16MU

Manufacturer Part Number
AT90CAN32-16MU
Description
IC MCU AVR 32K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN32-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Operating Supply Voltage
0.5 V to 0.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
Package
64QFN EP
Family Name
90C
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90CAN32-16MU
Manufacturer:
ATMEL
Quantity:
717
Table 24-8.
7679H–CAN–08/08
ZPAGEMSB
ZPAGEMSB
ZPAGEMSB
PAGEMSB
PAGEMSB
PAGEMSB
PCWORD
PCWORD
PCWORD
ZPCMSB
ZPCMSB
ZPCMSB
PCPAGE
PCPAGE
PCPAGE
PCMSB
PCMSB
PCMSB
Explanation of Different Variables Used in
PC[13:7]
PC[14:7]
PC[15:7]
PC[6:0]
PC[6:0]
PC[6:0]
13
14
15
6
6
6
Notes:
Corresponding
Z-value
Z16
Z14:Z7
Z15:Z7
1. See
2. Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction.
3. The Z-register is only 16 bits wide. Bit 16 is located in RAMPZ register in I/O map.
Z7:Z1
Z7:Z1
Z16
Z7:Z1
Z14
Z15
Z7
Z7
Z7
(3)
Z-pointer during self-programming.
(3)
:Z7
“Addressing the Flash During Self-Programming” on page 327
Description
Most significant bit in the program counter. (The program counter is 14 bits PC[13:0])
Most significant bit which is used to address the words within one page (128 words in a page
requires 7 bits PC [6:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
Program counter page address: Page select, for Page Erase and Page Write.
Program counter word address: Word select, for filling temporary buffer (must be zero during
PAGE WRITE operation).
Most significant bit in the program counter. (The program counter is 15 bits PC[14:0])
Most significant bit which is used to address the words within one page (128 words in a page
requires 7 bits PC [6:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
Program counter page address: Page select, for Page Erase and Page Write.
Program counter word address: Word select, for filling temporary buffer (must be zero during
PAGE WRITE operation).
Most significant bit in the program counter. (The program counter is 16 bits PC[15:0])
Most significant bit which is used to address the words within one page (128 words in a page
requires 7 bits PC [6:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
Program counter page address: Page select, for Page Erase and Page Write.
Program counter word address: Word select, for filling temporary buffer (must be zero during
PAGE WRITE operation).
Figure 24-3 on page 328
(2)
and the Mapping to the Z-Pointer
AT90CAN32/64/128
for details about the use of
(1)
335

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