PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 319

• Manufacturer Part Number: PIC18F458T-I/PT
• Description: IC MCU FLASH 16KX16 W/CAN 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
W
C
Z
N
W
C
W
C
Z
N
W
C
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
literal ‘k’
[ label ] SUBLW k
0
k – (W)
N, OV, C, DC, Z
W is subtracted from the eight-bit
literal ‘k’. The result is placed in W.
1
1
SUBLW
SUBLW
SUBLW
Subtract W from Literal
Read
Q2
0000
1
?
1
1
0
0
2
?
0
1
1
0
3
?
FF
0
0
1
k
255
; result is positive
; result is zero
; result is negative
; (2’s complement)
0x02
0x02
0x02
W
1000
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
Subtract W from f
[ label ] SUBWF
0
d
a
(f) – (W)
N, OV, C, DC, Z
Subtract W from register ‘f’ (2’s
complement method). If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
1
1
SUBWF REG
SUBWF REG, W
SUBWF REG
Read
Q2
0101
3
2
?
1
2
1
0
0
2
2
?
2
0
1
1
0
0x01
0x02
?
0xFFh ;(2’s complement)
0x02
0x00
0x00
0x01
f
[0,1]
[0,1]
PIC18FXX8
255
; result is negative
; result is positive
; result is zero
11da
dest
Process
Data
Q3
DS41159E-page 317
f [,d [,a]]
ffff
destination
Write to
Q4
ffff