DSPIC30F5015-30I/PT Microchip Technology, DSPIC30F5015-30I/PT Datasheet - Page 164

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: IC DSPIC MCU/DSP 66K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 66KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 52
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F501530IPT

TABLE 21-7:
TABLE 21-8:
RCON
OSCCON 0742
OSCTUN
PMD1
PMD2
Legend:
Note
FOSC
FWDT
FBORPOR F80004
FBS
FSS
FGS
FICD
Legend:
Note
Name
SFR
Name
1:
1:
2:
3:
Addr.
0740 TRAPR IOPUWR BGST
0744
0770
0772
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
The FGS<2> bit is a read-only copy of the GCP bit (FGS<1>).
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Reserved bits read as ‘1’ and must be programmed as ‘1’.
Address
F80000
F80002
F80006
F80008
F8000A
F8000C
Bit 15
T5MD
—
—
—
SYSTEM INTEGRATION REGISTER MAP
DEVICE CONFIGURATION REGISTER MAP
FWDTEN
MCLREN
BKBUG
Bit 15
FCKSM<1:0>
—
—
—
Bit 14
T4MD
—
—
COSC<2:0>
Bit 14
COE
Bit 13
T3MD
—
—
—
—
—
—
—
Bit 12
T2MD
Bit 13
—
—
—
—
—
—
—
—
Reserved
Reserved
IC4MD IC3MD
Bit 11
T1MD QEIMD PWMMD
—
—
—
Bit 12
(2)
(2)
—
—
—
—
—
Bit 10
—
—
Bit 11
NOSC<2:0>
—
—
—
—
—
—
—
IC2MD
Bit 9
—
—
PWMPIN
(1)
Bit 10
IC1MD
Bit 8
—
—
—
—
—
—
—
—
(1)
I2CMD
EXTR
FOS<2:0>
Bit 7
—
—
HPOL
POST<1:0>
Bit 9
—
—
—
—
Reserved
U2MD
SWR
Bit 6
Reserved
—
—
LPOL
Bit 8
(2)
—
—
—
SWDTEN
LOCK
U1MD
(2)
Bit 5
—
—
BOREN
Bit 7
—
—
—
—
—
—
SPI2MD SPI1MD
WDTO
Bit 4
—
—
Bit 6
—
—
—
—
—
—
—
OC4MD OC3MD
SLEEP
Bit 3
CF
Bit 5
FWPSA<1:0>
—
—
—
—
—
TUN<4:0>
BORV<1:0>
IDLE
Bit 2
—
—
Bit 4
LPOSCEN OSWEN Depends on Configuration bits.
—
—
—
—
OC2MD
C1MD
Bit 1
BOR
Bit 3
—
—
—
ADCMD
OC1MD
Bit 0
POR
Reserved
FPR<4:0>
Bit 2
Depends on type of Reset.
—
—
FWPSB<3:0>
Reserved
Reserved
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
(3)
Reset State
(2)
(2)
Bit 1
GCP
FPWRT<1:0>
ICS<1:0>
GWRP
Bit 0