AT32UC3A1512-AUR Atmel, AT32UC3A1512-AUR Datasheet - Page 703

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AT32UC3A1512-AUR

Manufacturer Part Number
AT32UC3A1512-AUR
Description
MCU 32BIT 512KB FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A1512-AUR

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A1512-AUR
Manufacturer:
Atmel
Quantity:
10 000
33.6.4
Figure 33-2. EOCx and DRDY Flag Behavior
32058J–AVR32–04/11
CHx(CHSR)
DRDY(SR)
EOCx(SR)
Conversion Results
With START=1
Write CR
When a conversion is completed, the resulting 10-bit digital value is stored in the Channel Data
Register (CDR) of the current channel and in the ADC Last Converted Data Register (LCDR).
The channel EOC bit in the Status Register (SR) is set and the DRDY is set. In the case of a
connected PDC channel, DRDY rising triggers a data transfer request. In any case, either EOC
and DRDY can trigger an interrupt.
Reading one of the CDR registers clears the corresponding EOC bit. Reading LCDR clears the
DRDY bit and the EOC bit corresponding to the last converted channel.
Conversion Time
Read CDRx
With START=1
Write CR
Conversion Time
AT32UC3A
Read LCDR
703

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