AT32UC3B1256-AUT Atmel, AT32UC3B1256-AUT Datasheet - Page 339

• Manufacturer Part Number: AT32UC3B1256-AUT
• Description: IC MCU AVR32 256KB FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1256-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 28
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: AVR UC3
• No. Of I/o's: 28
• Ram Memory Size: 32KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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32059K–03/2011
SENDA: Send Address
STTTO: Start Time-out
STPBRK: Stop Break
STTBRK: Start Break
RSTSTA: Reset Status Bits
TXDIS: Transmitter Disable
TXEN: Transmitter Enable
RXDIS: Receiver Disable
RXEN: Receiver Enable
RSTTX: Reset Transmitter
RSTRX: Reset Receiver
0: No effect.
1: In Multidrop Mode only, the next character written to the THR is sent with the address bit set.
0: No effect.
1: Starts waiting for a character before clocking the time-out counter. Resets the status bit TIMEOUT in CSR.
0: No effect.
1: Stops transmission of the break after a minimum of one character length and transmits a high level during 12-bit periods. No
0: No effect.
1: Starts transmission of a break after the characters present in THR and the Transmit Shift Register have been transmitted. No
0: No effect.
1: Resets the status bits PARE, FRAME, OVRE, MANERR, and RXBRK in CSR.
0: No effect.
1: Disables the transmitter.
0: No effect.
1: Enables the transmitter if TXDIS is 0.
0: No effect.
1: Disables the receiver.
0: No effect.
1: Enables the receiver, if RXDIS is 0.
0: No effect.
1: Resets the transmitter.
0: No effect.
1: Resets the receiver.
effect if no break is being transmitted.
effect if a break is already being transmitted.
AT32UC3B
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