ATMEGA640-16AU Atmel, ATMEGA640-16AU Datasheet - Page 124
![IC MCU AVR 64K FLASH 100-TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA640-16AU
Manufacturer Part Number
ATMEGA640-16AU
Description
IC MCU AVR 64K FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA640-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
8KB
# I/os (max)
86
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
86
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA640-16AU
Manufacturer:
OSRAM
Quantity:
12 000
Part Number:
ATMEGA640-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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15.7.3
2549M–AVR–09/10
Fast PWM Mode
Figure 15-5. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCF0A Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating
the TOP value. However, changing TOP to a value close to BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care since the CTC mode does not
have the double buffering feature. If the new value written to OCR0A is lower than the current
value of TCNT0, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFF) and wrap around starting at 0x00 before the Compare Match can
occur.
For generating a waveform output in CTC mode, the OC0A output can be set to toggle its logical
level on each Compare Match by setting the Compare Output mode bits to toggle mode
(COM0A1:0 = 1). The OC0A value will not be visible on the port pin unless the data direction for
the pin is set to output. The waveform generated will have a maximum frequency of f
f
equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
As for the Normal mode of operation, the TOV0 Flag is set in the same timer clock cycle that the
counter counts from MAX to 0x00.
The fast Pulse Width Modulation or fast PWM mode (WGM02:0 = 3 or 7) provides a high fre-
quency PWM waveform generation option. The fast PWM differs from the other PWM option by
its single-slope operation. The counter counts from BOTTOM to TOP then restarts from BOT-
TOM. TOP is defined as 0xFF when WGM2:0 = 3, and OCR0A when WGM2:0 = 7. In non-
inverting Compare Output mode, the Output Compare (OC0x) is cleared on the Compare Match
between TCNT0 and OCR0x, and set at BOTTOM. In inverting Compare Output mode, the out-
put is set on Compare Match and cleared at BOTTOM. Due to the single-slope operation, the
operating frequency of the fast PWM mode can be twice as high as the phase correct PWM
mode that use dual-slope operation. This high frequency makes the fast PWM mode well suited
for power regulation, rectification, and DAC applications. High frequency allows physically small
sized external components (coils, capacitors), and therefore reduces total system cost.
In fast PWM mode, the counter is incremented until the counter value matches the TOP value.
The counter is then cleared at the following timer clock cycle. The timing diagram for the fast
PWM mode is shown in
clk_I/O
/2 when OCR0A is set to zero (0x00). The waveform frequency is defined by the following
TCNTn
OCn
(Toggle)
Period
1
Figure
15-6. The TCNT0 value is in the timing diagram shown as a his-
ATmega640/1280/1281/2560/2561
f
OCnx
2
=
------------------------------------------------- -
2 N
3
⋅
⋅
f
(
clk_I/O
1
+
4
OCRnx
)
OCnx Interrupt Flag Set
(COMnx1:0 = 1)
OC0
124
=
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