ATMEGA640-16AU Atmel, ATMEGA640-16AU Datasheet - Page 77
![IC MCU AVR 64K FLASH 100-TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA640-16AU
Manufacturer Part Number
ATMEGA640-16AU
Description
IC MCU AVR 64K FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA640-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
8KB
# I/os (max)
86
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
86
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA640-16AU
Manufacturer:
OSRAM
Quantity:
12 000
Part Number:
ATMEGA640-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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2549M–AVR–09/10
Table 12-2
ure 12-5 on page 76
generated internally in the modules having the alternate function.
Table 12-2.
The following subsections shortly describe the alternate functions for each port, and relate the
overriding signals to the alternate function. Refer to the alternate function description for further
details.
Signal Name
DIEOE
DIEOV
PUOE
DDOE
DDOV
PUOV
PVOE
PVOV
PTOE
AIO
DI
summarizes the function of the overriding signals. The pin and port indexes from
Generic Description of Overriding Signals for Alternate Functions
Pull-up Override
Pull-up Override
Override Enable
Override Enable
Override Enable
Enable Override
Enable Override
Override Value
Override Value
Data Direction
Data Direction
Input/Output
Digital Input
Digital Input
Digital Input
Port Toggle
Full Name
Port Value
Port Value
are not shown in the succeeding tables. The overriding signals are
Enable
Enable
Analog
Value
Value
ATmega640/1280/1281/2560/2561
If this signal is set, the pull-up enable is controlled by the PUOV
If this signal is set, the Output Driver Enable is controlled by the
DIEOV signal. If this signal is cleared, the Digital Input Enable is
value is controlled by the PVOV signal. If PVOE is cleared, and
the Output Driver is enabled, the port Value is controlled by the
clock source, the module with the alternate function will use its
This is the Analog Input/output to/from alternate functions. The
This is the Digital Input to alternate functions. In the figure, the
If PVOE is set, the port value is set to PVOV, regardless of the
If PUOE is set, the pull-up is enabled/disabled when PUOV is
before the synchronizer. Unless the Digital Input is used as a
If this signal is set and the Output Driver is enabled, the port
set/cleared, regardless of the setting of the DDxn, PORTxn,
DIEOV is set/cleared, regardless of the MCU state (Normal
If DDOE is set, the Output Driver is enabled/disabled when
signal is connected directly to the pad, and can be used bi-
signal. If this signal is cleared, the pull-up is enabled when
DDOV is set/cleared, regardless of the setting of the DDxn
If this bit is set, the Digital Input Enable is controlled by the
If DIEOE is set, the Digital Input is enabled/disabled when
signal is connected to the output of the schmitt trigger but
DDOV signal. If this signal is cleared, the Output driver is
determined by MCU state (Normal mode, sleep mode).
If PTOE is set, the PORTxn Register bit is inverted.
setting of the PORTxn Register bit.
enabled by the DDxn Register bit.
{DDxn, PORTxn, PUD} = 0b010.
and PUD Register bits.
PORTxn Register bit.
mode, sleep mode).
own synchronizer.
Description
directionally.
Register bit.
Fig-
77
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