ATSAM3U1CA-CU Atmel, ATSAM3U1CA-CU Datasheet - Page 1021

• Manufacturer Part Number: ATSAM3U1CA-CU
• Description: IC MCU 32BIT 64KB FLASH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U1CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 20 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

40.3.5
40.3.5.1
40.3.5.2
6430D–ATARM–25-Mar-11
Programming a Channel
Programming Examples
Single-buffer Transfer (Row 1)
Four registers, the DMAC_DSCRx, the DMAC_CTRLAx, the DMAC_CTRLBx and
DMAC_CFGx, need to be programmed to set up whether single or multi-buffer transfers take
place, and which type of multi-buffer transfer is used. The different transfer types are shown in
Table 40-1 on page
The “BTSIZE, SADDR and DADDR” columns indicate where the values of DMAC_SARx,
DMAC_DARx, DMAC_CTLx, and DMAC_LLPx are obtained for the next buffer transfer when
multi-buffer DMAC transfers are enabled.
1. Read the Channel Handler Status Register DMAC_CHSR.ENABLE Field to choose a
2. Clear any pending interrupts on the channel from the previous DMAC transfer by read-
3. Program the following channel registers:
free (disabled) channel.
ing the interrupt status register, DMAC_EBCISR.
a. Write the starting source address in the DMAC_SADDRx register for channel x.
b. Write the starting destination address in the DMAC_DADDRx register for channel
c. Program DMAC_CTRLAx, DMAC_CTRLBx and DMAC_CFGx according to Row 1
d. Write the control information for the DMAC transfer in the DMAC_CTRLAx and
– i. Set up the transfer type (memory or non-memory peripheral for source and
– ii. Set up the transfer characteristics, such as:
e. Write the channel configuration information into the DMAC_CFGx register for chan-
– i. Designate the handshaking interface type (hardware or software) for the source
– ii. If the hardware handshaking interface is activated for the source or destination
destination) and flow control device by programming the FC of the DMAC_CTRLBx
register.
and destination peripherals. This is not required for memory. This step requires
programming the SRC_H2SEL/DST_H2SEL bits, respectively. Writing a ‘1’ activates
the hardware handshaking interface to handle source/destination requests. Writing a
‘0’ activates the software handshaking interface to handle source/destination
requests.
peripheral, assign a handshaking interface to the source and destination peripheral.
This requires programming the SRC_PER and DST_PER bits, respectively.
– Transfer width for the source in the SRC_WIDTH field.
– Transfer width for the destination in the DST_WIDTH field.
– Incrementing/decrementing or fixed address for source in SRC_INC field.
– Incrementing/decrementing or fixed address for destination in DST_INC field.
x.
as shown in
both DST_DSCR and SRC_DSCR fields set to one.
DMAC_CTRLBx registers for channel x. For example, in the register, you can pro-
gram the following:
nel x.
1020.
Table 40-1 on page
1020. Program the DMAC_CTRLBx register with
SAM3U Series
1021