ATSAM3U1CA-CU Atmel, ATSAM3U1CA-CU Datasheet - Page 623

• Manufacturer Part Number: ATSAM3U1CA-CU
• Description: IC MCU 32BIT 64KB FLASH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U1CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 20 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

33.4.1
Table 33-3.
33.5
33.5.1
33.5.2
33.5.3
33.6
33.6.1
6430D–ATARM–25-Mar-11
Pin Name
TWD
TWCK
Product Dependencies
Functional Description
I/O Lines Description
I/O Lines
Power Management
Interrupt
Transfer Format
I/O Lines Description
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following step:
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Nested Vector Interrupt Controller
(NVIC). In order to handle interrupts, the NVIC must be programmed before configuring the TWI.
Table 33-4.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
33-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
33-3).
• Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
• Enable the peripheral clock.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
Instance
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
TWI0
TWI1
Peripheral IDs
18
19
ID
Figure 33-2 on page
622). When the bus is free, both lines are
SAM3U Series
Input/Output
Input/Output
Type
Figure
Figure
623