P80C32X2FN,112 NXP Semiconductors, P80C32X2FN,112 Datasheet - Page 53

• Manufacturer Part Number: P80C32X2FN,112
• Description: IC 80C51 MCU 256 ROMLESS 40DIP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C32X2FN,112

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 33MHz
• Interface Type: UART
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Processor Series: P80C3x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935269611112; P80C32X2FN; P80C32X2FN

Table 11) is programmed, MOVC instructions executed from external
internal memory, EA is latched on Reset and all further programming
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
MASK ROM DEVICES
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. If the encryption table is programmed, the
code will be encrypted when verified. When only security bit 1 (see
program memory are disabled from fetching code bytes from the
Table 11. Program Security Bits
NOTES:
80C51X2 ROM CODE SUBMISSION
When submitting a ROM code for the 80C51X2, the following must be specified:
1. 4 kbyte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
80C52X2 ROM CODE SUBMISSION
When submitting a ROM code for the 80C52X2, the following must be specified:
1. 8 kbyte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
2003 Jan 24
PROGRAM LOCK BITS
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
ADDRESS
0000H to 0FFFH
1000H to 103FH
1040H
1040H
Security Bit #1:
Security Bit #2:
Encryption:
1
2
SB1
U
P
SB2
U
U
1, 2
Enabled
Enabled
No
PROTECTION DESCRIPTION
No Program Security features enabled.
(Code verify will still be encrypted by the Encryption Array if programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes from
internal memory, EA is sampled and latched on Reset, and further programming of the EPROM is disabled.
CONTENT
DATA
KEY
SEC
SEC
Disabled
Disabled
Yes
If Yes, must send key file.
53
BIT(S)
7:0
7:0
0
1
of the EPROM is disabled. When security bits 1 and 2 are
programmed, in addition to the above, verify mode is disabled.
Encryption Array
64 bytes (87C51), or 32 bytes (87C52/4) of encryption array are
initially unprogrammed (all 1s).
P80C3xX2; P80C5xX2;
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
P87C5xX2
Product data