LPC3143FET180,551 NXP Semiconductors, LPC3143FET180,551 Datasheet - Page 36

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LPC3143FET180,551

Manufacturer Part Number
LPC3143FET180,551
Description
IC ARM9 MCU USB OTG 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC3000r
Datasheet

Specifications of LPC3143FET180,551

Package / Case
180-TFBGA
Voltage - Supply (vcc/vdd)
1.1 V ~ 1.3 V
Operating Temperature
-40°C ~ 85°C
Speed
270MHz
Number Of I /o
20
Core Processor
ARM9
Program Memory Type
External Program Memory
Ram Size
192K x 8
Data Converters
A/D 4x10b
Oscillator Type
External
Peripherals
DMA, I²S, LCD, PWM, WDT
Connectivity
EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
Core Size
32-Bit
Processor Series
LPC31
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
192 KB
Interface Type
I2C, I2S, SPI, JTAG, UART, USB
Maximum Clock Frequency
270 MHz
Number Of Timers
5
Operating Supply Voltage
1.2 V, 1.8 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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NXP Semiconductors
LPC3141_3143
Preliminary data sheet
6.29 Timer module
6.30 Pulse Width Modulation (PWM) module
6.31 System control registers
6.32 I
The LPC3141/3143 contains four fully independent timer modules, which can be used to
generate interrupts after a pre-set time interval has elapsed.
This module has the following features:
This PWM can be used to generate a pulse width modulated or a pulse density modulated
signal. With an external low pass filter, the module can be used to generate a low frequent
analog signal. A typical use of the output of the module is to control the backlight of an
LCD display.
This module has the following features:
The System Control Registers (SysCReg) module provides a register interface for some
of the high-level settings in the system such as multiplexers and mode settings. This is an
auxiliary module included in this overview for the sake of completeness.
The I
2
2. Dedicated LCD interface only: This is the LCD mode. The NAND flash supply voltage
S
(SUP4) can be different from the LCD supply voltage (SUP8).
Each timer is a 32 bit wide down-counter with selectable pre-scale. The pre-scaler
allows using either the module clock directly or the clock divided by 16 or 256.
Two modes of operation:
– Free-running timer: The timer generates an interrupt when the counter reaches
– Periodic timer: The timer generates an interrupt when the counter reaches zero. It
At any time the current timer value can be read.
At any time the value in the load register may be re-written, causing the timer to
restart.
Supports Pulse Width Modulation (PWM) with software controlled duty cycle.
Supports Pulse Density Modulation (PDM) with software controlled pulse density.
Audio interface compatible with the I
I
I
Supports LSB justified words of 16, 18, 20 and 24 bit.
Supports a configurable number of bit clock periods per word select period (up to 128
bit clock periods).
2
2
2
S receive block supports master mode and slave mode.
S transmit block supports master mode.
S receive/I
zero. The timer wraps around to 0xFFFF FFFF and continues counting down.
reloads the value from a load register and continues counting down from that
value. An interrupt will be generated every time the counter reaches zero. This
effectively gives a repeated interrupt at a regular interval.
All information provided in this document is subject to legal disclaimers.
2
S transmit modules have the following features:
Rev. 0.16 — 27 May 2010
2
S standard.
LPC3141/3143
© NXP B.V. 2010. All rights reserved.
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