Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 33

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Z8F082AHH020SG2156

Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F082AHH020SG2156

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
UM012811-0904
Escaped Mode Addressing
Figure 10. Register Addressing Using 4-Bit Addresses
Escaped Mode Addressing with 8-bit Addresses
Using Escaped Mode Addressing 12-bit addresses can specify a Working Register. If the
high nibble of the 8-bit address is
ple, if Working Register R12 (
address operand in the opcode. To access Registers with addresses
the Working Group Pointer, RP[7:4], to
Escaped Mode Addressing with 12-bit Addresses
Using Escaped Mode Addressing, address mode ER for the source or destination can spec-
ify a Working Register with 4-bit addressing.
If the high byte of the source or destination address is EEH (11101110B), a Working Reg-
ister is inferred. For example, the operand EE3H selects Working Register R3. The full 12-
bit address is given by {RP[3:0], RP[7:4], 3H}.
To access Registers on Page EH (addresses E00H to EFFH), set the Page Pointer, RP[3:0],
to EH and set the Working Group Pointer, RP[7:4], to the desired Working Group.
One Operand
Instruction
(Example)
Addresses
Two 4-bit
(dst, src)
Program Memory
{dst[3:0],
src[3:0]}
Opcode
CH
) is the desired destination operand, use
EH
(1110b), a Working Register is inferred. For exam-
EH
or use indirect addressing.
{RP[3:0], RP[7:4], dst[3:0]}
{RP[3:0], RP[7:4], src[3:0]}
12-bit address is
12-bit address is
E0H
Addressing Modes
to
ECH
EFH
Register File
Destination
User Manual
Register
Register
Source
as the 8-bit
, either set
eZ8 CPU
23

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