Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 44
Z8F082AHH020SG2156
Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F082AHH020SG2156.pdf
(240 pages)
Specifications of Z8F082AHH020SG2156
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
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Illegal Instruction Traps
Description
UM012811-0904
Caution:
Symbolic Operation of an Illegal Instruction Trap
Linear Programs that do not Employ the Stack
The instruction set of the eZ8 CPU does not cover all possible sequences of binary values.
Binary values and sequences for which no operation is defined are illegal instructions.
When the eZ8 CPU fetches one of these illegal instructions, it performs an Illegal Instruc-
tion Trap operation.
The Illegal Instruction Trap functions similarly to a TRAP #%3 instruction (object code
F2H 03H
Counter detects an illegal instruction it does not increment. The Program Counter value
that is pushed onto the stack points to the illegal instruction.
The most significant byte (MSB) of the Illegal Instruction Trap Vector is stored at Pro-
gram Memory address
Trap Vector is stored at Program Memory address
Trap Vector replaces the value in the Program Counter (PC). Program execution resumes
from the new value in the Program Counter.
The Stack Pointer must point to a section of the Register File that does not overwrite user
program data. Even for linear program code that may not employ the stack for Call and/or
Interrupt routines, set the Stack Pointer to prepare for possible Illegal Instruction Traps.
An IRET instruction must not be performed following an Illegal Instruction Trap
service routine. Because the stack contains the Program Counter value of the il-
legal instruction, the IRET instruction returns the code execution to this illegal
instruction.
SP
@SP
SP
@SP
PC
). The Flags and Program Counter are pushed on the stack. When the Program
←
←
←
←
←
SP - 2
SP - 1
Vector
PC
Flags
0006H
. The least significant byte (LSB) of the Illegal Instruction
0007H
. The 16-bit Illegal Instruction
Illegal Instruction Traps
User Manual
eZ8 CPU
34
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