Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 83

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Z8F082AHH020SG2156

Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F082AHH020SG2156

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
BSWAP
Bit Swap
BSWAP dst
UM012811-0904
Mnemonic
BSWAP
Operation
Description
Flags
Attributes
Escaped Mode Addressing
Example
dst[7:0]
The contents of the Register are bit flipped:
dst[7] <--> dst[0]
dst[6] <--> dst[1]
dst[5] <--> dst[2]
dst[4] <--> dst[3]
Using Escaped Mode Addressing, address mode R specifies a Working Register. If the
destination address is prefixed by
ple, if Working Register R12 (
nation operand in the opcode. To access Registers with addresses
the Working Group Pointer, RP[7:4], to
C
Z
S
V
D
H
Destination
R1
If Register 27H contains the value
BSWAP 27
Object Code: D5 27
Undefined.
Set if the result is zero; reset otherwise.
Set if the result is negative; reset otherwise.
Reset to 0.
Unaffected.
Unaffected.
dst[0:7]
Opcode (Hex)
D5
CH
) is the desired destination operand, use
EH
(1110B), a Working Register is inferred. For exam-
53H
Operand 1
R1
EH
or use indirect addressing.
(01010011B), the statement:
eZ8 CPU Instruction Set Description
Operand 2
E0H
to
EFH
ECH
Operand 3
User Manual
, either set
as the desti-
eZ8 CPU
73

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