ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 113
![IC MCU 8BIT 1V FLASH MEM 32LQFP](/photos/12/33/123302/st7foxk1t6_sml.jpg)
ST7FOXK1T6
Manufacturer Part Number
ST7FOXK1T6
Description
IC MCU 8BIT 1V FLASH MEM 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FOXF1M6.pdf
(226 pages)
Specifications of ST7FOXK1T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-6336
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST7FOXF1, ST7FOXK1, ST7FOXK2
10.3.4
In this case, the HALT instruction stops the oscillator. When the oscillator is stopped, the Lite
timer stops counting and is no longer able to generate a Watchdog reset until the
microcontroller receives an external interrupt or a reset.
If an external interrupt is received, the WDG restarts counting after 4096 CPU clocks. If a
reset is generated, the Watchdog is disabled (reset state).
Recommendations
Figure 54. Watchdog timing diagram
Low power modes
Table 39.
WDGD BIT
INTERNAL
WATCHDOG
RESET
f
WDG
Make sure that an external event is available to wake up the microcontroller from Halt
mode.
Before executing the HALT instruction, refresh the WDGD bit, to avoid an unexpected
Watchdog reset immediately after waking up the microcontroller.
When using an external interrupt to wake up the microcontroller, reinitialize the
corresponding I/O as “Input Pull-up with Interrupt” before executing the HALT
instruction. The main reason for this is that the I/O may be wrongly configured due to
external interference or by an unforeseen logical condition.
For the same reason, reinitialize the level sensitiveness of each external interrupt as a
precautionary measure.
Active Halt
Mode
Slow
Effect of low power modes on Lite timer 2
Wait
Halt
(2ms @ 8MHz f
t
WDG
OSC
SOFTWARE SETS
WDGD BIT
)
HARDWARE CLEARS
WDGD BIT
(this peripheral is driven directly by f
Lite timer stops counting
No effect on Lite timer
No effect on Lite timer
No effect on Lite timer
Description
WATCHDOG RESET
On-chip peripherals
OSC
/32)
113/226
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