ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 177
![IC MCU 8BIT 1V FLASH MEM 32LQFP](/photos/12/33/123302/st7foxk1t6_sml.jpg)
ST7FOXK1T6
Manufacturer Part Number
ST7FOXK1T6
Description
IC MCU 8BIT 1V FLASH MEM 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FOXF1M6.pdf
(226 pages)
Specifications of ST7FOXK1T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-6336
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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- Download datasheet (4Mb)
ST7FOXF1, ST7FOXK1, ST7FOXK2
Data register High (ADCDRH)
Reset value: xxxx xxxx (xxh)
Bits 7:0 = D[9:2] MSB of Analog Converted Value
ADC Control/data register Low (ADCDRL)
Reset value: 0000 00xx (0xh)
Bits 7:4 = Reserved. Forced by hardware to 0.
Bit 3 = SLOW Slow mode bit
Table 56.
1. The maximum allowed value of f
Bit 2 = Reserved. Forced by hardware to 0.
Bits 1:0 = D[1:0] LSB of Analog Converted value
Table 57.
Address
(Hex.)
0036h
0037h
0038h
D9
This bit is set and cleared by software. It is used together with the SPEED bit in the
ADCCSR register to configure the ADC clock speed as shown on the table below.
7
0
7
Reset Value
Reset Value
Reset Value
ADCCSR
ADCDRH
ADCDRL
Register
Configuring the ADC clock speed
ADC register mapping and reset values
label
D8
0
EOC
D9
7
0
0
0
x
D7
0
f
f
f
ADC
ADC
CPU
CPU
f
CPU
SPEED
is 4 MHz (see
(1)
/2
/4
D8
6
0
x
0
0
D6
0
ADON
Read/write
Read only
D7
5
0
x
0
0
Section 12.11 on page
SLOW
D5
D6
4
0
0
0
x
SLOW
CH3
D5
3
0
0
x
D4
0
209)
SLOW
CH2
D4
0
0
1
On-chip peripherals
2
0
0
x
D3
D1
CH1
D3
D1
1
0
x
x
SPEED
0
1
x
D2
177/226
D0
0
0
CH0
D2
D0
0
0
x
x
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