ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 128
![IC MCU 8BIT 1V FLASH MEM 32LQFP](/photos/12/33/123302/st7foxk1t6_sml.jpg)
ST7FOXK1T6
Manufacturer Part Number
ST7FOXK1T6
Description
IC MCU 8BIT 1V FLASH MEM 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FOXF1M6.pdf
(226 pages)
Specifications of ST7FOXK1T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-6336
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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Figure 65. One pulse mode sequence
When a valid event occurs on the ICAP1 pin, the counter value is loaded in the ICR1
register. The counter is then initialized to FFFCh, the OLVL2 bit is output on the OCMP1 pin
and the ICF1 bit is set.
Because the ICF1 bit is set when an active edge occurs, an interrupt can be generated if the
ICIE bit is set.
Clearing the input capture interrupt request (that is, clearing the ICFi bit) is done in two
steps:
1.
2.
The OC1R register value required for a specific timing application can be calculated using
the following formula:
Equation 3
Where:
t =
f
PRESC
If the timer clock is an external clock the formula is:
Equation 4
Where:
t =
f
When the value of the counter is equal to the value of the contents of the OC1R register, the
OLVL1 bit is output on the OCMP1 pin, (see
CPU
EXT
Reading the SR register while the ICFi bit is set.
Accessing (reading or writing) the ICiLR register.
=
=
=
OCiR =
pulse period (in seconds)
CPU clock frequency (in hertz)
timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits, see
Control register 2 (TACR2) on page
pulse period (in seconds)
external timer clock frequency (in hertz)
t
*
f
EXT
-5
When event
occurs on
OCiR value =
= OC1R
ICAP1
counter
When
Figure
One pulse mode cycle
PRESC
t
OCMP1 = OLVL1
OCMP1 = OLVL2
Counter is reset
134)
*
ICR1 = counter
ICF1 bit is set
f
CPU
to FFFCh
66).
ST7FOXF1, ST7FOXK1, ST7FOXK2
- 5
: Timer A
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