ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 148

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
24.8.3
148/182
Figure 46. Generation mechanisms for the CPU clock
Clock generation modes
The next
generation mode.
Table 62.
1. The external clock input range refers to a CPU clock range of 1...40 MHz. Moreover, the PLL usage is
2. The limits on input frequency are 4 to 12 MHz since the usage of the internal oscillator amplifier is required.
3. The maximum depends on the duty cycle of the external clock signal: When 40 MHz is used, 50% duty
1
1
1
1
0
0
0
0
limited to 4 to 12 MHz input frequency range. All configurations need a crystal (or ceramic resonator) to
generate the CPU clock through the internal oscillator amplifier (apart from Direct Drive): vice versa, the
clock can be forced through an external clock source only in Direct Drive mode (on-chip oscillator amplifier
disabled, so no crystal or resonator can be used).
Also when the PLL is not used and the CPU clock corresponds to f
shall be used: it is not possible to force any clock though an external clock source.
cycle shall be granted (low phase = high phase = 12.5ns); when 20 MHz is selected, a 25% duty cycle can
be accepted (minimum phase, high or low, again equal to 12.5ns).
(P0H.7-5)
P0.15-13
1
1
0
0
1
1
0
0
Phase locked loop operation
Direct clock drive
Prescaler operation
Table 62
f
f
f
f
f
f
1
0
1
0
1
0
1
0
XTAL
CPU
XTAL
CPU
XTAL
CPU
On-chip clock generator selections
f
CPU frequency
CPU
associates the combinations of these three bits with the respective clock
f
f
f
f
f
f
XTAL
f
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
= f
-
XTAL
x 10
x 4
x 3
x 8
x 5
x 1
/ 2
x F
External clock input range
Main OSC (MHz)
5.3 to 10.6
6.4 to 8
1 to 40
4 to 12
4 to 8
4 to 5
4
-
XTAL
/2, an external crystal or resonator
(1)(2)
TCL
Default configuration
Direct drive
(oscillator bypassed)
CPU clock via prescaler
Reserved
TCL
TCL TCL
TCL TCL
Notes
ST10F273M
(3)
(2)