ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 39

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ST10F273M-4TR3

Manufacturer Part Number
ST10F273M-4TR3
Description
MCU 16BIT 512K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F273M-4TR3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST10F273M-4TR3
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST10F273M
5.4.12
5.5
Table 18.
XFlash interface control dummy register (XFICR)
XFICR (0x0E E0000)
Table 19.
Protection strategy
The protection bits are stored in Non-Volatile Flash cells that are read once at reset and
stored in five Volatile registers. Before they are read from the Non-Volatile cells, all the
available protections are forced active during reset.
15:4
15
Bit
Bit
3:0
3
2
1
0
14
WS3...WS0
PGER
Name
ERER
Name
10ER
ERR
FER register bits (continued)
XFlash interface control register
-
13
12
1 over 0 error
Program error
Erase error
Write error
Dummy Wait States 3:0
Reserved. These bits must be kept to their default value (0).
This bit is automatically set when trying to program at 1 bits previously set at
0 (this does not happen when programming the Protection bits). This error is
not due to a failure of the Flash cell, but only flags that the desired data has
not been written. This bit must be cleared by software.
This bit is automatically set when a Program error occurs during a Flash write
operation. This error is due to a real failure of a Flash cell, that can no more
be programmed. The word where this error occurred must be discarded. This
bit must be cleared by software.
This bit is automatically set when an Erase error occurs during a Flash write
operation. This error is due to a real failure of a Flash cell, that can no more
be erased. This kind of error is fatal and the sector where it occurred must be
discarded. This bit must be cleared by software.
This bit is automatically set when an error occurs during a Flash write
operation or when a bad write operation setup is done. Once the error has
been discovered and understood, ERR bit must be cleared by software.
In the ST10F273E, these bits were used to configure the number of wait-
states to access the XFlash. As there is no XFlash on the ST10F273M, these
bits have no effect.
This register is implemented for software compatibility with the ST10F273E.
11
Reserved
10
-
9
8
FCR
7
Function
Function
6
5
4
Internal Flash memory
WS3 WS2 WS1 WS0
RW
3
Reset value: 0007h
RW
2
RW
1
39/182
RW
0

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