MC9S08AC48MFDE Freescale Semiconductor, MC9S08AC48MFDE Datasheet - Page 186
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MC9S08AC48MFDE
Manufacturer Part Number
MC9S08AC48MFDE
Description
MCU 8BIT 48K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC60CFJE.pdf
(348 pages)
Specifications of MC9S08AC48MFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 10 Internal Clock Generator (S08ICGV4)
10.6.4
In this example, the FLL will be used (in FEI mode) to multiply the internal 243 kHz (approximate)
reference clock up to 10.8 MHz to achieve 5.4 MHz bus frequency. This system will also use the trim
function to fine tune the frequency based on an external reference signal.
After the MCU is released from reset, the ICG is in self-clocked mode (SCM) and supplies approximately
8 MHz on ICGOUT which corresponds to a 4 MHz bus frequency (f
The clock scheme will be FLL engaged, internal (FEI). So
Solving for N / R gives:
A trim procedure will be required to hone the frequency to exactly 5.4 MHz. An example of the trim
procedure is shown in example #4.
The values needed in each register to set up the desired operation are:
ICGC1 = $28 (%00101000)
ICGC2 = $31 (%00110001)
ICGS1 = $xx
ICGS2 = $xx
ICGFLTLU/L = $xx
186
Bit 7
Bit 6
Bit 5
Bits 4:3 CLKS
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6:4 MFD
Bit 3
Bit 2:0 RFD
This is read only except for clearing interrupt flag
This is read only; good idea to read this before performing time critical operations
Not used in this example
N / R = 10.8 MHz /(243/7 kHz * 64) = 4.86 ; We can choose N = 10 and R = 2.
Example #3: No External Crystal Connection, 5.4 MHz Bus
Frequency
HGO
RANGE
REFS
OSCSTEN 0
LOCD
LOLRE
LOCRE
f
ICGOUT
0
0
1
01
0
0
0
011 Sets the MFD multiplication factor to 10
0
001 Sets the RFD division factor to ÷2
= (f
Configures oscillator for low power
Configures oscillator for low-frequency range; FLL prescale factor is 64
Oscillator using crystal or resonator requested (bit is really a don’t care)
FLL engaged, internal reference clock mode
Disables the oscillator
Loss-of-clock enabled
Unimplemented or reserved, always reads zero
Generates an interrupt request on loss of lock
Generates an interrupt request on loss of clock
IRG
MC9S08AC60 Series Data Sheet, Rev. 2
/ 7) * P * N / R ; P = 64, f
IRG
= 243 kHz
Bus
).
Freescale Semiconductor
Eqn. 10-5
Eqn. 10-6
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