MC56F8011VFAE Freescale Semiconductor, MC56F8011VFAE Datasheet - Page 22

• Manufacturer Part Number: MC56F8011VFAE
• Description: IC DIGITAL SIGNAL CTLR 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8011VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 26
• Data Ram Size: 2 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• For Use With: CPA56F8013 - BOARD SOCKET FOR MC56F8013APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22
Table 2-3 56F8013/56F8011 Signal and Package Information for the 32-Pin LQFP (Continued)
5. This signal is also brought out on the GPIOA4 pin.
6. This signal is also brought out on the GPIOA5 pin.
Return to
GPIOB2
GPIOB3
GPIOA0
(PWM0)
(MISO)
(MOSI)
Signal
Name
(T2
(T3
5
6
)
)
Table 2-2
Pin No.
LQFP
17
16
29
Output
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
State During
Input with
Input with
Input with
enabled
enabled
enabled
internal
internal
internal
56F8013/56F8011 Data Sheet, Rev. 12
pull-up
pull-up
pull-up
Reset
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SPI Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device
is not selected. The slave device places data on the MISO line a
half-cycle before the clock edge the master device uses to latch the
data.
T2 — Timer, Channel 2
After reset, the default state is GPIOB2. The alternative peripheral
functionality is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SPI Master Out/Slave In— This serial data pin is an output from a
master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
T3 — Timer, Channel 3
After reset, the default state is GPIOB3. The alternative peripheral
functionality is controlled via the SIM. See
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM0 — This is one of the six PWM output pins.
After reset, the default state is GPIOA0.
Signal Description
Section
Section
Freescale Semiconductor
6.3.8.
6.3.8.