MC9S12P96VFT Freescale Semiconductor, MC9S12P96VFT Datasheet - Page 155
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MC9S12P96VFT
Manufacturer Part Number
MC9S12P96VFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P96VFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Chapter 6
S12S Debug Module (S12SDBGV2)
6.1
The S12SDBG module provides an on-chip trace buffer with flexible triggering capability to allow non-
intrusive debug of application software. The S12SDBG module is optimized for S12SCPU debugging.
Typically the S12SDBG module is used in conjunction with the S12SBDM module, whereby the user
configures the S12SDBG module for a debugging session over the BDM interface. Once configured the
S12SDBG module is armed and the device leaves BDM returning control to the user program, which is
then monitored by the S12SDBG module. Alternatively the S12SDBG module can be configured over a
serial interface using SWI routines.
6.1.1
COF: Change Of Flow. Change in the program flow due to a conditional branch, indexed jump or interrupt.
BDM: Background Debug Mode
S12SBDM: Background Debug Module
DUG: Device User Guide, describing the features of the device into which the DBG is integrated.
WORD: 16 bit data entity
Data Line: 20 bit data entity
CPU: S12SCPU module
DBG: S12SDBG module
POR: Power On Reset
Tag: Tags can be attached to CPU opcodes as they enter the instruction pipe. If the tagged opcode reaches
the execution stage a tag hit occurs.
Freescale Semiconductor
Revision Number
02.07
02.08
02.09
Introduction
Glossary Of Terms
13.DEC.2007
09.MAY.2008
29.MAY.2008
Revision
Date
S12P-Family Reference Manual, Rev. 1.13
Sections
Affected
General
6.4.5.4
6.5
Table 6-1. Revision History
Added application information
Spelling corrections. Revision history format changed.
Added note for end aligned, PurePC, rollover case.
Summary of Changes
155
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