MC9S12P96VFT Freescale Semiconductor, MC9S12P96VFT Datasheet - Page 85

• Manufacturer Part Number: MC9S12P96VFT
• Description: MCU 16BIT 96K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P96VFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime
1. Read: Anytime
2.3.36
2.3.37
Freescale Semiconductor
Address 0x0254
Address 0x0255
Write: Anytime
Write: Anytime
PERM
PPSM
Field
Field
Reset
Reset
5-0
5-0
W
W
R
R
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
only effect if used in wired-or mode. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Port M pull device select—Configure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
If CAN is active the selection of a pull-down device on the RXCAN input will have no effect.
1 A pull-down device is selected
0 A pull-up device is selected
Port M Pull Device Enable Register (PERM)
Port M Polarity Select Register (PPSM)
0
0
0
0
7
7
Figure 2-34. Port M Pull Device Enable Register (PERM)
0
0
0
0
6
6
Figure 2-35. Port M Polarity Select Register (PPSM)
Table 2-32. PERM Register Field Descriptions
Table 2-33. PPSM Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
PERM5
PPSM5
5
0
5
0
PERM4
PPSM4
0
0
4
4
Description
Description
PERM3
PPSM3
0
0
3
3
PERM2
PPSM2
0
0
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
Access: User read/write
PERM1
PPSM1
0
0
1
1
PERM0
PPSM0
0
0
0
0
85
(1)
(1)