MC9S12P96VFT Freescale Semiconductor, MC9S12P96VFT Datasheet - Page 38

• Manufacturer Part Number: MC9S12P96VFT
• Description: MCU 16BIT 96K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P96VFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Overview MC9S12P-Family
1.7.3
1.7.3.1
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the internal reference clock. XTAL is the oscillator output.
1.7.3.2
The RESET pin is an active low bidirectional control signal. It acts as an input to initialize the MCU to a
known start-up state, and an output when an internal MCU function causes a reset. The RESET pin has an
internal pull-up device.
1.7.3.3
This input only pin is reserved for factory test. This pin has an internal pull-down device.
1.7.3.4
The BKGD/MODC pin is used as a pseudo-open-drain pin for the background debug communication. It
is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET. The BKGD pin has an internal pull-up device.
1.7.3.5
PAD[9:0] are general-purpose input or output pins and analog inputs AN[9:0] of the analog-to-digital
converter ATD.
1.7.3.6
PA[7:0] are general-purpose input or output pins.
1.7.3.7
PB[7:0] are general-purpose input or output pins.
1.7.3.8
PE7 is a general-purpose input or output pin. An internal pull-up is enabled during reset. It can be
configured to output ECLKX2.
1.7.3.9
PE[6:5] are a general-purpose input or output pins.
38
Detailed Signal Descriptions
EXTAL, XTAL — Oscillator Pins
RESET — External Reset Pin
TEST — Test Pin
BKGD / MODC — Background Debug and Mode Pin
PAD[9:0] / AN[9:0] — Port AD Input Pins of ATD
PA[7:0] — Port A I/O Pins
PB[7:0] — Port B I/O Pins
PE7 — Port E I/O Pin 7 / ECLKX2
PE[6:5] — Port E I/O Pin 6-5
The TEST pin must be tied to V
S12P-Family Reference Manual, Rev. 1.13
SSX
NOTE
in all applications.
Freescale Semiconductor