MC9S12P96MFT Freescale Semiconductor, MC9S12P96MFT Datasheet - Page 235

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MC9S12P96MFT

Manufacturer Part Number
MC9S12P96MFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P96MFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.3.2.22
This register protects the clock configuration registers from accidental overwrite:
CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL, CPMUIRCTRIMH/L and CPMUOSC
Read: Anytime
Write: Anytime
Freescale Semiconductor
0x02FB
Reset
PROT
Field
0
W
R
Clock Configuration Registers Protection Bit — This bit protects the clock configuration registers from
accidental overwrite (see list of affected registers above).
Writing 0x26 to the CPMUPROT register clears the PROT bit, other write accesses set the PROT bit.
0 Protection of clock configuration registers is disabled.
1 Protection of clock configuration registers is enabled. CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL,
S12CPMU Protection Register (CPMUPROT)
0
0
7
CPMUIRCTRIMH/L and CPMUOSC registers are not writable.
Figure 7-29. S12CPMU Protection Register (CPMUPROT)
0
0
6
S12P-Family Reference Manual, Rev. 1.13
0
0
5
0
0
4
Description
S12 Clock, Reset and Power Management Unit (S12CPMU)
0
0
3
0
0
2
0
0
1
PROT
0
0
235

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