MC9S12P96MFT Freescale Semiconductor, MC9S12P96MFT Datasheet - Page 437

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MC9S12P96MFT

Manufacturer Part Number
MC9S12P96MFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P96MFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.3.2.4
This Flash register is reserved for factory testing.
All bits in the FRSV0 register read 0 and are not writable.
13.3.2.5
The FCNFG register enables the Flash command complete interrupt and forces ECC faults on Flash array
read access from the CPU.
CCIE, IGNSF, FDFD, and FSFD bits are readable and writable while remaining bits read 0 and are not
writable.
Freescale Semiconductor
CCOBIX[1:0]
Offset Module Base + 0x000C
Offset Module Base + 0x0004
Reset
Reset
Field
2–0
W
W
R
R
CCIE
Flash Reserved0 Register (FRSV0)
Flash Configuration Register (FCNFG)
0
0
0
Common Command Register Index— The CCOBIX bits are used to select which word of the FCCOB register
array is being read or written to. See
for more details.
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 13-9. Flash Configuration Register (FCNFG)
Figure 13-8. Flash Reserved0 Register (FRSV0)
Table 13-11. FCCOBIX Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
0
0
0
0
5
5
Section 13.3.2.11, “Flash Common Command Object Register
IGNSF
0
0
0
4
4
Description
0
0
0
0
3
3
128 KByte Flash Module (S12FTMRC128K1V1)
0
0
0
0
2
2
FDFD
0
0
0
1
1
(FCCOB),”
FSFD
0
0
0
0
0
437

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