MC9S12P96MFT Freescale Semiconductor, MC9S12P96MFT Datasheet - Page 367
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MC9S12P96MFT
Manufacturer Part Number
MC9S12P96MFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P96MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.3.2.1
Read: Anytime, if AMAP = 0. If only SCIBDH is written to, a read will not return the correct data until
SCIBDL is written to as well, following a write to SCIBDH.
Write: Anytime, if AMAP = 0.
The SCI baud rate register is used by to determine the baud rate of the SCI, and to control the infrared
modulation/demodulation submodule.
Freescale Semiconductor
1.These registers are accessible if the AMAP bit in the SCISR2 register is set to zero.
2,These registers are accessible if the AMAP bit in the SCISR2 register is set to one.
Module Base + 0x0000
Module Base + 0x0001
Register
SCIDRH
Reset
Reset
SCIDRL
0x0006
0x0007
Name
W
W
R
R
SBR7
IREN
SCI Baud Rate Registers (SCIBDH, SCIBDL)
0
0
7
7
W
W
R
R
Those two registers are only visible in the memory map if AMAP = 0 (reset
condition).
Bit 7
R8
R7
T7
SBR6
TNP1
0
0
6
6
Figure 11-2. SCI Register Summary (Sheet 2 of 2)
= Unimplemented or Reserved
Figure 11-3. SCI Baud Rate Register (SCIBDH)
Figure 11-4. SCI Baud Rate Register (SCIBDL)
R6
T8
T6
6
S12P-Family Reference Manual, Rev. 1.13
TNP0
SBR5
0
0
5
5
R5
T5
5
0
SBR12
SBR4
NOTE
0
0
4
4
R4
T4
4
0
SBR11
SBR3
0
0
3
3
R3
T3
3
0
Serial Communication Interface (S12SCIV5)
SBR10
SBR2
0
1
2
2
R2
T2
2
0
SBR9
SBR1
0
0
1
1
R1
T1
1
0
SBR8
SBR0
Bit 0
R0
T0
0
0
0
0
0
367
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