MC9S08DV96CLF Freescale Semiconductor, MC9S08DV96CLF Datasheet - Page 15

no-image

MC9S08DV96CLF

Manufacturer Part Number
MC9S08DV96CLF
Description
MCU 8BIT 96K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DV96CLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S08DV
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
87
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
A/d Bit Size
12 bit
A/d Channels Available
24
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08DV96CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Section Number
12.3 Register Definition .........................................................................................................................257
12.4 Programmer’s Model of Message Storage .....................................................................................275
12.5 Functional Description ...................................................................................................................284
12.6 Initialization/Application Information ...........................................................................................304
13.1 Introduction ....................................................................................................................................307
Freescale Semiconductor
12.3.1 MSCAN Control Register 0 (CANCTL0) ......................................................................257
12.3.2 MSCAN Control Register 1 (CANCTL1) ......................................................................260
12.3.3 MSCAN Bus Timing Register 0 (CANBTR0) ...............................................................261
12.3.4 MSCAN Bus Timing Register 1 (CANBTR1) ...............................................................262
12.3.5 MSCAN Receiver Interrupt Enable Register (CANRIER) .............................................265
12.3.6 MSCAN Transmitter Flag Register (CANTFLG) ..........................................................266
12.3.7 MSCAN Transmitter Interrupt Enable Register (CANTIER) ........................................267
12.3.8 MSCAN Transmitter Message Abort Request Register (CANTARQ) ...........................268
12.3.9 MSCAN Transmitter Message Abort Acknowledge Register (CANTAAK) .................269
12.3.10MSCAN Transmit Buffer Selection Register (CANTBSEL) .........................................269
12.3.11MSCAN Identifier Acceptance Control Register (CANIDAC) ......................................270
12.3.12MSCAN Miscellaneous Register (CANMISC) ..............................................................271
12.3.13MSCAN Receive Error Counter (CANRXERR) ............................................................272
12.3.14MSCAN Transmit Error Counter (CANTXERR) ..........................................................273
12.3.15MSCAN Identifier Acceptance Registers (CANIDAR0-7) ............................................273
12.3.16MSCAN Identifier Mask Registers (CANIDMR0–CANIDMR7) .................................274
12.4.1 Identifier Registers (IDR0–IDR3) ...................................................................................278
12.4.2 IDR0–IDR3 for Standard Identifier Mapping .................................................................280
12.4.3 Data Segment Registers (DSR0-7) .................................................................................281
12.4.4 Data Length Register (DLR) ...........................................................................................282
12.4.5 Transmit Buffer Priority Register (TBPR) ......................................................................283
12.4.6 Time Stamp Register (TSRH–TSRL) .............................................................................283
12.5.1 General ............................................................................................................................284
12.5.2 Message Storage .............................................................................................................285
12.5.3 Identifier Acceptance Filter .............................................................................................288
12.5.4 Modes of Operation ........................................................................................................295
12.5.5 Low-Power Options ........................................................................................................296
12.5.6 Reset Initialization ..........................................................................................................302
12.5.7 Interrupts .........................................................................................................................302
12.6.1 MSCAN initialization .....................................................................................................304
12.6.2 Bus-Off Recovery ...........................................................................................................305
13.1.1 Features ...........................................................................................................................309
13.1.2 Block Diagrams ..............................................................................................................309
13.1.3 SPI Baud Rate Generation ..............................................................................................311
Serial Peripheral Interface (S08SPIV3)
MC9S08DZ128 Series Data Sheet, Rev. 1
Chapter 13
Title
Page
15

Related parts for MC9S08DV96CLF