MCHC908GR8ACFAE Freescale Semiconductor, MCHC908GR8ACFAE Datasheet - Page 101

IC MCU 8K FLASH 8MHZ 32-LQFP

MCHC908GR8ACFAE

Manufacturer Part Number
MCHC908GR8ACFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MCHC908GR8ACFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08G
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8ACFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 8
External Interrupt (IRQ)
8.1 Introduction
The IRQ (external interrupt) module provides a maskable interrupt input.
8.2 Features
Features of the IRQ module include:
8.3 Functional Description
A logic 0 applied to the external interrupt pin can latch a central processor unit (CPU) interrupt request.
Figure 8-2
Interrupt signals on the IRQ pin are latched into the IRQ latch. An interrupt latch remains set until one of
the following actions occurs:
The external interrupt pin is falling-edge triggered and is software-configurable to be either falling-edge
or falling-edge and low-level triggered. The MODE bit in the INTSCR controls the triggering sensitivity of
the IRQ pin.
When an interrupt pin is edge-triggered only, the interrupt remains set until a vector fetch, software clear,
or reset occurs.
When an interrupt pin is both falling-edge and low-level triggered, the interrupt remains set until both of
these events occur:
Freescale Semiconductor
A dedicated external interrupt pin (IRQ)
IRQ interrupt control bits
Hysteresis buffer
Programmable edge-only or edge and level interrupt sensitivity
Automatic interrupt acknowledge
Internal pullup resistor
Vector fetch — A vector fetch automatically generates an interrupt acknowledge signal that clears
the latch that caused the vector fetch.
Software clear — Software can clear an interrupt latch by writing to the appropriate acknowledge
bit in the interrupt status and control register (INTSCR). Writing a 1 to the ACK bit clears the IRQ
latch.
Reset — A reset automatically clears the interrupt latch.
Vector fetch or software clear
Return of the interrupt pin to logic 1
shows the structure of the IRQ module.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
101

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