MCHC908GR8ACFAE Freescale Semiconductor, MCHC908GR8ACFAE Datasheet - Page 199

• Manufacturer Part Number: MCHC908GR8ACFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
Addr.
$0010
$0011
$0012
RECEIVER/ERROR CPU INTERRUPT REQUEST
Register Name
SPI Status and Control
TRANSMITTER CPU INTERRUPT REQUEST
SPMSTR
SPI Control Register
DIVIDER
CLOCK
Register (SPSCR)
SPI Data Register
BUSCLK
See page 213.
See page 214.
See page 216.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
÷ 128
SPE
÷ 32
(SPCR)
(SPDR)
÷ 2
÷ 8
SPR1
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
SELECT
CLOCK
Figure 16-2. SPI Module Block Diagram
Figure 16-3. SPI I/O Register Summary
SPR0
SPRIE
Bit 7
SPRF
R7
T7
R
0
0
7
= Reserved
CONTROL
ERRIE
TRANSMIT DATA REGISTER
RECEIVE DATA REGISTER
R6
T6
6
6
R
0
0
SPI
SHIFT REGISTER
INTERNAL BUS
5
4
SPMSTR
OVRF
R5
T5
3
5
1
0
MODF
OVRF
SPRF
SPTE
SPMSTR
2
1
MODFEN
MODF
CPOL
Unaffected by reset
ERRIE
SPTIE
SPRIE
SPE
R4
T4
0
CLOCK
4
0
0
LOGIC
CPHA
= Unimplemented
CPHA
SPTE
CPOL
R3
T3
SPWOM
3
1
1
M
S
MODFEN
SPWOM
CONTROL
LOGIC
R2
T2
PIN
2
0
0
Functional Description
SPR1
SPE
R1
T1
1
0
0
MISO
MOSI
SPSCK
SS
SPTIE
Bit 0
SPR0
R0
T0
0
0
199