HD64F3672FY Renesas Electronics America, HD64F3672FY Datasheet - Page 109

• Manufacturer Part Number: HD64F3672FY
• Description: IC H8 MCU FLASH 16K 48QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FY

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.2.4
Bit 7 (FLSHE) in FENR enables or disables the CPU access to the flash memory control registers,
FLMCR1, FLMCR2, and EBR1.
7.3
There is a mode for programming/erasing of the flash memory; boot mode, which enables on-
board programming/erasing. On-board programming/erasing can also be performed in user
program mode. At reset-start in reset mode, this LSI changes to a mode depending on the TEST
pin settings, NMI pin settings, and input level of each port, as shown in table 7.1. The input level
of each pin must be defined four states before the reset ends.
When changing to boot mode, the boot program built into this LSI is initiated. The boot program
transfers the programming control program from the externally-connected host to on-chip RAM
via SCI3. After erasing the entire flash memory, the programming control program is executed.
This can be used for programming initial values in the on-board state or for a forcible return when
programming/erasing can no longer be done in user program mode. In user program mode,
individual blocks can be erased and programmed by branching to the user program/erase control
program prepared by the user.
Table 7.1
Legend: X: Don’t care.
Bit
7
6 to 0 —
TEST
0
0
Bit Name Initial Value
FLSHE
Flash Memory Enable Register (FENR)
On-Board Programming Modes
NMI
1
0
Setting Programming Modes
0
All 0
E10T_0
X
1
PB0
X
X
R/W
R/W
—
PB1
X
X
Description
Flash Memory Control Register Enable
Flash memory control registers can be accessed when
this bit is set to 1. Flash memory control registers cannot
be accessed when this bit is set to 0.
Reserved
These bits are always read as 0.
PB2
X
X
LSI State after Reset End
User Mode
Boot Mode
Rev.4.00 Nov. 02, 2005 Page 83 of 304
REJ09B0143-0400
Section 7 ROM