MC9S12XET256MAL Freescale Semiconductor, MC9S12XET256MAL Datasheet - Page 1179

• Manufacturer Part Number: MC9S12XET256MAL
• Description: MCU 16BIT 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 12x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Cpu Family: HCS12X
• Device Core Size: 16b
• Frequency (max): 50MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 16KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 25
• Operating Supply Voltage (typ): 1.8/2.8/5V
• Operating Supply Voltage (max): 1.98/2.9/5.5V
• Operating Supply Voltage (min): 1.72/2.7/3.13V
• On-chip Adc: 16-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.4.2.1
The Erase Verify All Blocks command will verify that all P-Flash and D-Flash blocks have been erased.
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed.
29.4.2.2
The Erase Verify Block command allows the user to verify that an entire P-Flash or D-Flash block has been
erased. The FCCOB upper global address bits determine which block must be verified.
Upon clearing CCIF to launch the Erase Verify Block command, the Memory Controller will verify that
the selected P-Flash or D-Flash block is erased. The CCIF flag will set after the Erase Verify Block
operation has completed.
Freescale Semiconductor
FERSTAT
Register
FSTAT
Erase Verify All Blocks Command
Erase Verify Block Command
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Table 29-33. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
Table 29-35. Erase Verify Block Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
EPVIOLIF
Table 29-34. Erase Verify All Blocks Command Error Handling
ACCERR
Error Bit
FPVIOL
000
000
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 000 at command launch
Set if a Load Data Field command sequence is currently active
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
None
0x01
0x02
CAUTION
FCCOB Parameters
FCCOB Parameters
Chapter 29 1024 KByte Flash Module (S12XFTM1024K5V2)
Global address [22:16] of the
Error Condition
Flash block to be verified
Not required
.
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