MCF51EM128CLK Freescale Semiconductor, MCF51EM128CLK Datasheet - Page 245

• Manufacturer Part Number: MCF51EM128CLK
• Description: IC MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.3.2
The level seven interrupt requests cannot have their levels reassigned. However, any of the remaining
peripheral interrupt requests can be reassigned as the highest priority maskable requests using these two
registers (INTC_PL6P7 and INTC_PL6P6). The vector number associated with the interrupt requests does
not change. Rather, only the interrupt request's level and priority are altered, based on the contents of the
INTC_PL6P{7,6} registers.
Freescale Semiconductor
Offset: CF1_INTC_BASE + 0x10 (INTC_FRC)
Field
LVL1
LVL2
LVL3
LVL4
LVL5
LVL6
LVL7
Reset
63
62
61
60
59
58
57
55
W
R
Reserved, must be cleared.
Force Level 1 interrupt.
0 Negates the forced level 1 interrupt request.
1 Forces a level 1 interrupt request.
Force Level 2 interrupt.
0 Negates the forced level 2 interrupt request.
1 Forces a level 2 interrupt request.
Force Level 3 interrupt.
0 Negates the forced level 3 interrupt request.
1 Forces a level 3 interrupt request.
Force Level 4 interrupt.
0 Negates the forced level 4 interrupt request.
1 Forces a level 4 interrupt request.
Force Level 5 interrupt.
0 Negates the forced level 5 interrupt request.
1 Forces a level 5 interrupt request.
Force Level 6 interrupt.
0 Negates the forced level 6 interrupt request.
1 Forces a level 6 interrupt request.
Force Level 7 interrupt.
0 Negates the forced level 7 interrupt request.
1 Forces a level 7 interrupt request.
INTC Programmable Level 6, Priority {7,6} Registers
(INTC_PL6P{7,6})
63
0
0
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
LVL1
62
0
Figure 10-2. Force Interrupt Register (INTC_FRC)
Table 10-4. INTC_FRC Field Descriptions
LVL2
61
0
LVL3
60
0
Description
LVL4
59
0
LVL5
58
0
Interrupt Controller (CF1_INTC)
LVL6
57
0
Access: Read/Write
LVL7
56
0
10-9