MC68CK16Z1CAG16 Freescale Semiconductor, MC68CK16Z1CAG16 Datasheet - Page 36
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MC68CK16Z1CAG16
Manufacturer Part Number
MC68CK16Z1CAG16
Description
IC MICROPROCESSOR 16BIT 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet
1.MC68HC16Z1VEH16.pdf
(500 pages)
Specifications of MC68CK16Z1CAG16
Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
68HC16
No. Of I/o's
16
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
11
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
144LQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68CK16Z1CAG16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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3.1.4 Masked ROM Module (MRM) — (MC68HC16Z2/Z3 Only)
3.1.5 Analog-to-Digital Converter (ADC)
3.1.6 Queued Serial Module (QSM)
3.1.7 Multichannel Communication Interface (MCCI) — (MC68HC16Z4/CKZ4 Only)
3.1.8 General-Purpose Timer (GPT)
3.2 Intermodule Bus
3.3 System Block Diagram and Pin Assignment Diagrams
3-2
The intermodule bus (IMB) is a standardized bus developed to facilitate the design of
modular microcontrollers. It contains circuitry that supports exception processing, ad-
dress space partitioning, multiple interrupt levels, and vectored interrupts. The stan-
dardized modules in M68HC16 Z-series MCUs communicate with one another via the
IMB. Although the full IMB supports 24 address and 16 data lines, M68HC16 Z-series
MCUs use only 20 address lines. ADDR[23:20] follow the state of ADDR19.
Figure 3-1
Figure 3-2
functional diagram of the MC68HC16Z4/CKZ4 MCU. Although diagram blocks repre-
sent the relative size of the physical modules, there is not a one-to-one correspon-
dence between location and size of blocks in the diagram and location and size of
integrated-circuit modules.
• 8-Kbyte array, accessible as bytes or words
• User-selectable default base address
• User-selectable bootstrap ROM function
• User-selectable ROM verification code
• Eight channels, eight result registers
• Eight automated modes
• Three result alignment modes
• Enhanced serial communication interface
• Queued serial peripheral interface
• One 8-bit dual function port
• Two channels of enhanced SCI (UART)
• One channel of SPI
• Two 16-bit free-running counters with prescaler
• Three input capture channels
• Four output compare channels
• One input capture/output compare channel
• One pulse accumulator/event counter input
• Two pulse width modulation outputs
• Optional external clock input
is a functional diagram of the MC68HC16Z1/CKZ1/CMZ1 MCU. Refer to
for a functional diagram of the MC68HC16Z2/Z3 MCU.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
OVERVIEW
M68HC16 Z SERIES
Figure 3-3
USER’S MANUAL
is a
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