MC68CK16Z1CAG16 Freescale Semiconductor, MC68CK16Z1CAG16 Datasheet - Page 404

• Manufacturer Part Number: MC68CK16Z1CAG16
• Description: IC MICROPROCESSOR 16BIT 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68CK16Z1CAG16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 11
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 144LQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

D.5.1 ADC Module Configuration Register
ADCMCR — ADC Module Configuration Register
STOP — Low-Power Stop Mode Enable
FRZ[1:0] — Freeze Assertion Response
SUPV — Supervisor/Unrestricted
D.5.2 ADC Test Register
ADCTEST — ADC Test Register
D.5.3 Port ADA Data Register
PORTADA — Port ADA Data Register
D-30
RESET:
STOP
15
15
1
RESET:
ADCMCR controls ADC operation during low-power stop mode, background debug
mode, and freeze mode.
STOP places the ADC in low-power state. Setting STOP aborts any conversion in
progress. STOP is set to logic level one during reset, and may be cleared to logic level
zero by the CPU16. Clearing STOP enables normal ADC operation. However, be-
cause analog circuitry bias current has been turned off, there is a period of recovery
before output stabilization.
The FRZ field determines ADC response to assertion of the FREEZE signal when the
device is placed in background debug mode. Refer to
This bit has no effect because the CPU16 always operates in supervisor mode.
Used for factory test only.
Port ADA is an input port that shares pins with the A/D converter inputs.
0 = Normal operation
1 = Low-power operation
14
14
0
FRZ
13
13
0
12
NOT USED
12
FRZ[1:0]
Freescale Semiconductor, Inc.
00
01
10
11
11
For More Information On This Product,
NOT USED
Table D-25 Freeze Encoding
10
Go to: www.freescale.com
Ignore FREEZE, continue conversions
Reserved
Finish conversion in process, then freeze
Freeze immediately
REGISTER SUMMARY
9
8
8
PADA7 PADA6 PADA5 PADA4 PADA3 PADA2 PADA1 PADA0
SUPV
7
7
1
Response
6
6
REFLECTS STATE OF THE INPUT PINS
Table
5
4
D-25.
NOT USED
3
M68HC16 Z SERIES
USER’S MANUAL
2
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0
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