C8051F063-GQR Silicon Laboratories Inc, C8051F063-GQR Datasheet - Page 248

• Manufacturer Part Number: C8051F063-GQR
• Description: IC 8051 MCU 64K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F063-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit, 1 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F060/1/2/3/4/5/6/7
248
Mode
Status
Code
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
Data byte transmitted. ACK received.
START condition transmitted.
Repeated START condition transmitted.
Slave Address + W transmitted. ACK
received.
Slave Address + W transmitted. NACK
received.
Data byte transmitted. NACK received.
Arbitration Lost.
Slave Address + R transmitted. ACK received.
Slave Address + R transmitted. NACK
received.
Data byte received. ACK transmitted.
Data byte received. NACK transmitted.
Table 20.1. SMB0STA Status Codes and States
SMBus State
Rev. 1.2
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with data to be transmit-
ted.
Acknowledge poll to retry. Set STO +
STA.
1) Load SMB0DAT with next byte, OR
2) Set STO, OR
3) Clear STO then set STA for repeated
START.
1) Retry transfer OR
2) Set STO.
Save current data.
If only receiving one byte, clear AA (send
NACK after received byte). Wait for
received data.
Acknowledge poll to retry. Set STO +
STA.
Read SMB0DAT. Wait for next byte. If
next byte is last byte, clear AA.
Set STO.
Typical Action