C8051F063-GQR Silicon Laboratories Inc, C8051F063-GQR Datasheet - Page 34

• Manufacturer Part Number: C8051F063-GQR
• Description: IC 8051 MCU 64K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F063-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit, 1 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F060/1/2/3/4/5/6/7
1.9.
The C8051F060/1/2/3 devices have an on-board 10-bit SAR ADC (ADC2) with a 9-channel input multi-
plexer and programmable gain amplifier. This ADC features a 200 ksps maximum throughput and true 10-
bit performance with an INL of ±1LSB. Eight input pins are available for measurement and can be pro-
grammed as single-ended or differential inputs. Additionally, the on-chip temperature sensor can be used
as an input to the ADC. The ADC is under full control of the CIP-51 microcontroller via the Special Function
Registers. The ADC2 voltage reference is selected between the analog power supply (AV+) and the exter-
nal VREF2 pin. User software may put ADC2 into shutdown mode to save power.
A flexible conversion scheduling system allows ADC2 conversions to be initiated by software commands,
timer overflows, or an external input signal. Conversion completions are indicated by a status bit and an
interrupt (if enabled), and the resulting 10-bit data word is latched into two SFR locations upon completion.
ADC2 also contains Window Compare registers, which can be configured to interrupt the controller when
ADC2 data is within or outside of a specified range. ADC2 can monitor a key voltage continuously in back-
ground mode, and not interrupt the controller unless the converted data is within the specified window.
34
AIN2.0
AIN2.1
AIN2.2
AIN2.3
AIN2.4
AIN2.5
AIN2.6
AIN2.7
Differential Measurement
10-Bit Analog to Digital Converter
Single-ended or
AGND
Analog Multiplexer
SENSOR
TEMP
AMUX
9-to-1
Figure 1.13. 10-Bit ADC Diagram
VREF2 Pin
Configuration and Control Registers
AV+
Rev. 1.2
ADC
VREF
10-Bit
SAR
Start Conversion
10
ADC Data
Registers
10
Write to AD2BUSY
Timer 3 Overflow
CNVSTR2 Input
Timer 2 Overflow
Conversion
Compare
Complete
Window
Interrupt
ADC2
Logic