M30280F6HP#U7B Renesas Electronics America, M30280F6HP#U7B Datasheet - Page 270

• Manufacturer Part Number: M30280F6HP#U7B
• Description: IC M16C/28 MCU FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280F6HP#U7B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
15.2 Resolution Select Function
15.3 Sample and Hold
15.4 Power Consumption Reducing Function
e
E
1
. v
J
6
0
C
2
9
0 .
2 /
B
The BITS bit in the ADCON1 register determines the resolution. When the BITS bit is set to “1” (10-bit
precision), the A/D conversion result is stored into bits 0 to 9 in the ADi register (i=0 to 7). When the BITS
bit is set to “0” (8-bit precision), the A/D conversion result is stored into bits 0 to 7 in the ADi register.
When the SMP bit in the ADCON 2 register is set to “1” (with the sample and hold function), A/D conver-
sion rate per pin increases to 28 AD cycles for 8-bit resolution or 33 AD cycles for 10-bit resolution. The
sample and hold function is available in one-shot mode, repeat mode, single sweep mode, repeat sweep
mode 0 and repeat sweep mode 1. In these modes, start A/D conversion after selecting whether the
sample and hold circuit is to be used or not. In simultaneous sample sweep mode, delayed trigger mode
0 or delayed trigger mode , set to use the Sample and Hold function before starting A/D conversion.
When the A/D converter is not used, the VCUT bit in the ADCON1 register isolates the resistor ladder of
the A/D converter from the reference voltage input pin (V
off any current flow into the resistor ladder from the V
When using the A/D converter, set the VCUT bit to “1” (Vref connected) before setting the ADST bit in the
ADCON0 register to “1” (A/D conversion started). Do not set the ADST bit and VCUT bit to “1” simulta-
neously, nor set the VCUT bit to “0” (Vref unconnected) during A/D conversion.
0
0
8
0
4
G
J
7
a
o r
0 -
. n
u
2
3
p
0
, 1
0
(
M
2
0
1
0
6
7
C
2 /
page 248
, 8
M
1
6
C
f o
2 /
8
3
) B
8
5
REF
REF
pin.
). Power consumption is reduced by shutting
15. A/D Converter