MC68HC16Z1CEH25 Freescale Semiconductor, MC68HC16Z1CEH25 Datasheet - Page 235

• Manufacturer Part Number: MC68HC16Z1CEH25
• Description: IC MCU 16BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

9.4.2 SCI Pins
9.4.3 SCI Operation
9.4.3.1 Definition of Terms
9.4.3.2 Serial Formats
M68HC16 Z SERIES
USER’S MANUAL
Two unidirectional pins, TXD (transmit data) and RXD (receive data), are associated
with the SCI. TXD can be used by the SCI or for general-purpose I/O. TXD function is
controlled by PQSPA7 in the port QS pin assignment register (PQSPAR) and TE in
SCI control register 1 (SCCR1). The receive data (RXD) pin is dedicated to the SCI.
The SCI can operate in polled or interrupt-driven mode. Status flags in SCSR reflect
SCI conditions regardless of the operating mode chosen. The TIE, TCIE, RIE, and ILIE
bits in SCCR1 enable interrupts for the conditions indicated by the TDRE, TC, RDRF,
and IDLE bits in SCSR, respectively.
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both 10-bit and 11-bit frames. The M bit in SCCR1 specifies the number of bits
per frame.
The most common data frame format for NRZ serial interfaces is one start bit, eight
data bits (LSB first), and one stop bit; a total of ten bits. The most common 11-bit data
frame contains one start bit, eight data bits, a parity or control bit, and one stop bit.
Ten-bit and 11-bit frames are shown in
• Bit-Time — The time required to transmit or receive one bit of data, which is equal
• Start Bit — One bit-time of logic zero that indicates the beginning of a data frame.
• Stop Bit — One bit-time of logic one that indicates the end of a data frame.
• Frame — A complete unit of serial information. The SCI can use 10-bit or 11-bit
• Data Frame — A start bit, a specified number of data or information bits, and at
• Idle Frame — A frame that consists of consecutive ones. An idle frame has no
• Break Frame — A frame that consists of consecutive zeros. A break frame has
to one cycle of the baud frequency.
A start bit must begin with a one-to-zero transition and be preceded by at least
three receive time samples of logic one.
frames.
least one stop bit.
start bit.
no stop bits.
Freescale Semiconductor, Inc.
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Go to: www.freescale.com
Table
9-4.
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