MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 75

IC MCU 32BIT 20MHZ 132-PQFP

MC68331CEH20

Manufacturer Part Number
MC68331CEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
80Byte
# I/os (max)
18
Number Of Timers - General Purpose
1
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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6.4 GPT Registers
GPTMCR — GPT Module Configuration Register
STOP — Stop Clocks
FRZ1 — Not implemented at this time
FRZ0 — FREEZE Response
STOPP — Stop Prescaler
INCP — Increment Prescaler
SUPV — Supervisor/Unrestricted Data Space
IARB — Interrupt Arbitration Field
MTR — GPT Module Test Register (Reserved)
ICR — GPT Interrupt Configuration Register
IPA — Interrupt Priority Adjust
IPL — Interrupt Priority Level
IVBA — Interrupt Vector Base Address
MC68331TS/D
RESET:
RESET:
STOP
15
15
0
0
The GPTMCR contains parameters for configuring the GPT.
The IARB field is used to arbitrate between simultaneous interrupt requests of the same priority. Each
module that can generate interrupt requests must be assigned a unique, non-zero IARB field value. Re-
fer to 3.8 Interrupts for more information.
This address is currently unused and returns zeros if read. It is reserved for GPT factory test.
Specifies which GPT interrupt source is given highest internal priority
Specifies the priority level of interrupts generated by the GPT.
Most significant nibble of interrupt vector number generated by the GPT when an interrupt service re-
quest is acknowledged.
0 = Internal clocks not shut down
1 = Internal clocks shut down
0 = Ignore FREEZE
1 = FREEZE the current state of the GPT
0 = Normal operation
1 = Stop prescaler and pulse accumulator from incrementing. Ignore changes to input pins.
0 = Has no meaning
1 = If STOPP is asserted, increment prescaler once and clock input synchronizers once.
0 = Registers with access controlled by SUPV bit are accessible from either user or supervisor priv-
1 = Registers with access controlled by SUPV bit are restricted to supervisor access only.
FRZ1
14
0
0
ilege level.
IPA
FRZ0
13
0
0
STOPP
12
12
0
0
Freescale Semiconductor, Inc.
INCP
11
11
For More Information On This Product,
0
0
0
10
10
0
0
0
Go to: www.freescale.com
IPL
9
0
0
0
8
0
0
8
0
SUPV
7
1
7
0
6
0
0
0
IVBA
5
0
0
0
4
0
0
4
0
3
0
3
0
0
0
2
0
0
IARB
0
1
0
0
$YFF900
$YFF902
$YFF904
0
0
0
0
0
75

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