MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 45

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.3 Status Register
SR —Status Register
System Byte
User Byte (Condition Code Register)
4.4 Data Types
4.5 Addressing Modes
MC68331TS/D
RESET:
15
T1
0
The status register contains the condition codes that reflect the results of a previous operation and can
be used for conditional instruction execution in a program. The lower byte containing the condition
codes is the only portion of the register available at the user privilege level; it is referenced as the con-
dition code register (CCR) in user programs. At the supervisor privilege level, software can access the
full status register, including the interrupt priority mask and additional control bits.
Six basic data types are supported:
Addressing in the CPU32 is register-oriented. Most instructions allow the results of the specified oper-
ation to be placed either in a register or directly in memory. This flexibility eliminates the need for extra
instructions to store register contents in memory. The CPU32 supports seven basic addressing modes:
Included in the register indirect addressing modes are the capabilities to post-increment, predecrement,
and offset. The program counter relative mode also has index and offset capabilities. In addition to
these addressing modes, many instructions implicitly specify the use of the status register, stack point-
er, or program counter.
T[1:0] —Trace Enable
S —Supervisor/User State
Bits [12:11] —Unimplemented
IP[2:0] —Interrupt Priority Mask
Bits [7:5] —Unimplemented
X —Extend
N —Negative
Z —Zero
V —Overflow
C —Carry
• Bits
• Packed Binary Coded Decimal Digits
• Byte Integers (8 bits)
• Word Integers (16 bits)
• Long-Word Integers (32 bits)
• Quad-Word Integers (64 bits)
• Register direct
• Register indirect
• Register indirect with index
• Program counter indirect with displacement
• Program counter indirect with index
• Absolute
• Immediate
14
T0
0
13
S
1
12
0
0
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
10
1
Go to: www.freescale.com
IP
1
8
1
7
0
0
6
0
0
5
0
0
X
U
4
N
U
3
U
2
Z
V
U
1
C
U
0
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