M38513E4FP#U0 Renesas Electronics America, M38513E4FP#U0 Datasheet - Page 57

• Manufacturer Part Number: M38513E4FP#U0
• Description: IC 740 MCU ROM 16K 42SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38513E4FP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Package: 42SSOP
• Family Name: 740
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: I2C-BUS
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Rev.
1.0
1.1
05/15/98
07/26/02
Date
REVISION HISTORY
1
3
4
7
10
11
13
18
20
21
24
26
26
31
31
33
35
35
36
37
37
38
39
40
40
41
42
44
47
47
52
Page
First Edition
Group name is changed.
Figure 1 is partly revised.
Table 1 is partly added.
Figure 3 is partly revised.
Figure 6 is partly revised.
Figure 8 is partly revised.
Figure 10 is partly revised.
“2” of Notes on Serial I/O is added.
Figure 19 is partly revised.
Explanations of “[I
Explanations of “•Bit 2: Slave address comparison flag (AAS)” of “[I
Register (S1)]” is partly revised.
Figure name of Figure 28 is revised.
Table 8 is partly revised.
Explanations of “Data Setting” are partly revised.
Figure 32 is partly revised.
Explanations of “Comparator and Control Circuit” is partly eliminated.
Explanations of “RESET CIRCUIT” is partly revised.
Figure 42 is partly revised.
Figure 43 is partly revised.
Explanations of “CLOCK GENERATING CIRCUIT” are partly added.
Explanations of “(1) Middle-speed mode” are partly revised.
Figure 47 is partly revised.
Figure 49 is partly revised.
Explanations of “A-D Converter” of “NOTES ON PROGRAMMING” are partly
revised.
“NOTES ON USAGE” is added.
Explanations of “DATA REQUIRED FOR ROM WRITING ORDERS” are partly
added.
Table 11 is partly revised.
Table 14 is partly revised.
Table 17 is partly revised.
Table 18 is partly revised.
PACKAGE OUTLINE is partly revised.
Pages 52–58 in Rev.1.0 are eliminated.
Notes is revised.
2
C Address Register (S0D)]” is partly revised.
(1/1)
3851 GROUP (built-in 16 KB ROM) DATA SHEET
Description
Summary
2
C Status