M30620FCPFP#U9C Renesas Electronics America, M30620FCPFP#U9C Datasheet - Page 183
![IC M16C/62P MCU FLSH 128K 100QFP](/photos/12/41/124183/m30620fcpfp_u9c_sml.jpg)
M30620FCPFP#U9C
Manufacturer Part Number
M30620FCPFP#U9C
Description
IC M16C/62P MCU FLSH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCPFP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30620FCPFP#U9CM30620FCPFP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 16.1
Start Trigger Signal for Timers A1, A2, A4
Write Signal to
Timer B2 Underflow
(Timer Mode)
Reload Control Signal for Timer A1
INV00 to INV07: Bits in INVC0 Register
INV10 to INV15: Bits in INVC1 Register
DUi, DUBi: Bits in IDBi Register (i=0,1)
TA1S to TA4S: Bits in TABSR Register
PWCOM: Bits in TB2SC Register
Timer B2
Timer B2
INV10
Trigger
Trigger
Trigger
Jan 10, 2006
When setting the TA1S bit to “0”,
signal is set to “0”
When setting the TA1S bit to “0”,
signal is set to “0”
TA4 Register
TA1 Register
TA2 Register
When setting the TA4S bit to “0”,
signal is set to “0”
(One-Shot Timer Mode)
(One-Shot Timer Mode)
(One-Shot Timer Mode)
T Q
T Q
T Q
Timer A4 Counter
Timer A1 Counter
Timer A2 Counter
Three-phase Motor Control Timer Functions Block Diagram
INV11
INV11
INV11
Reload
Reload
Reload
f1 or f2
TA41 Register
TA11 Register
TA21 Register
INV00
INV07
NOTES:
Reload Control
Signal for Timer A4
Reload Control
Signal for Timer A1
Reload Control
Signal for Timer A2
Page 166 of 390
1/2
1. Transfer trigger is generated only when the IDB0 and IDB1 registers are set and the first timer B2 underflows,
One-Shot
One-Shot
Timer A1
if the INV06 bit is set to “0” (triangular wave modulation).
Timer A4
One-Shot
Timer A2
Pulse
Pulse
0
1
Pulse
INV12
INV01
INV11
Transfer Trigger
Trigger
INV06
INV06
Trigger
INV06
INV13
Trigger
U-phase Output
Control Circuit
W-Phase Output
V-Phase Output
Control Circuit
Control Circuit
DUB1
DU1
D Q
T
D Q
T
1
0
PWCON
bit
bit
(1)
Circuit to set Interrupt
Generation Frequency
Trigger
Trigger
DUB0
Trigger
DU0
D Q
T
D Q
T
bit
bit
Switching to P8_0, P8_1 and P7_2 to P7_5 is not shown in this diagram.
Reload Register
ICTB2 Counter
n = 1 to 255
n = 1 to 255
Dead Time
Dead Time
n = 1 to 255
n = 1 to 255
Dead Time
ICTB2 Register n=1 to 15
n=1 to 15
Timer
Timer
W-Phase
Output Signal
W-Phase
Output Signal
Timer
V-Phase
Output Signal
V-Phase
Output Signal
U-Phase
Output Signal
U-Phase
Output Signal
16. Three-Phase Motor Control Timer Function
Three-Phase
Output
Shift Register
(U Phase)
D Q
T
D Q
T
D Q
T
D Q
T
D Q
T
D Q
T
Timer B2
Interrupt
Request Bit
Write signal to INV03 bit
Value to be written to
INV05
INV04
RESET
NMI
INV03 bit
INV02
INV03
D Q
T
R
Inverse
Control
Inverse
Control
Inverse
Control
Inverse
Control
Inverse
Control
Inverse
Control
INV14
U
U
W
W
V
V
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