M30620FCPFP#U9C Renesas Electronics America, M30620FCPFP#U9C Datasheet - Page 345
![IC M16C/62P MCU FLSH 128K 100QFP](/photos/12/41/124183/m30620fcpfp_u9c_sml.jpg)
M30620FCPFP#U9C
Manufacturer Part Number
M30620FCPFP#U9C
Description
IC M16C/62P MCU FLSH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCPFP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30620FCPFP#U9CM30620FCPFP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 23.11
Memory Expansion Mode, Microprocessor Mode
(For 3-wait setting, external area access and multiplex bus selection )
Read timing
Write timing
(no multiplex)
(no multiplex)
BCLK
CSi
ADi
/DBi
ADi
BHE
ALE
RD
BCLK
CSi
ADi
/DBi
ADi
BHE
ALE
WR, WRL
WRH
Measuring conditions
· V
· Input timing voltage : V
· Output timing voltage : V
t
cyc
Jan 10, 2006
=
CC1
=V
f(BCLK)
t
25ns.max
d(BCLK-ALE)
CC2
t
25ns.max
Timing Diagram (9)
(0.5×t
d(BCLK-ALE)
1
t
t
25ns.max
d(AD-ALE)
d(BCLK-AD)
t
25ns.max
t
(0.5×t
=5V
d(BCLK-AD)
d(AD-ALE)
cyc
-25)ns.min
t
25ns.max
cyc
d(BCLK-CS)
t
25ns.max
d(BCLK-CS)
-25)ns.min
Address
Address
Page 328 of 390
t
t
t
-4ns.min
cyc
cyc
h(BCLK-ALE)
t
IL
d(AD-RD)
t
-4ns.min
h(BCLK-ALE)
0ns.min
=0.8V, V
OL
=0.4V, V
(0.5×tcyc-15)ns.min
t
h(ALE-AD)
t
t
25ns.max
t
25ns.max
d(AD-WR)
d(BCLK-WR)
t
d(BCLK-RD)
t
40ns.max
dZ(RD-AD)
IH
8ns.max
0ns.min
d(BCLK-DB)
=2.0V
OH
=2.4V
(2.5×t
t
ac3(RD-DB)
cyc
-45)ns.max
(2.5×tcyc-40)ns.min
Data output
t
d(DB-WR)
t
40ns.min
Data input
su(DB-RD)
(0.5×t
(0.5×t
t
cyc
h(RD-CS)
cyc
-10)ns.min
t
-10)ns.min
h(WR-CS)
t
(0.5×t
t
t
(0.5×t
h(WR-DB)
(0.5×t
h(WR-AD)
h(RD-AD)
t
0ns.min
t
0ns.min
h(BCLK-WR)
h(RD-DB)
t
0ns.min
h(BCLK-RD)
cyc
cyc
cyc
-10)ns.min
-10)ns.min
-10)ns.min
V
CC1
t
4ns.min
t
4ns.min
t
4ns.min
h(BCLK-CS)
h(BCLK-CS)
h(BCLK-AD)
t
4ns.min
t
4ns.min
23. Electrical Characteristics
h(BCLK-AD)
h(BCLK-DB)
=V
CC2
=5V
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