HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 230

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 DMA Controller
The MAR value is incremented or decremented each time one byte or word is transferred,
automatically updating the source or destination memory address. For details, see section 8.2.4,
Data Transfer Control Registers (DTCR).
The MARs are not initialized by a reset or in standby mode.
8.2.2
An I/O address register (IOAR) is an 8-bit readable/writable register that specifies a source or
destination address. The IOAR value is the lower 8 bits of the address. The upper 16 address bits
are all 1 (H'FFFF).
An IOAR functions as a source or destination address register depending on how the DMAC is
activated: as a source address register if activation is by a receive-data-full interrupt from the SCI
(channel 0), and as a destination address register otherwise.
The IOAR value is held fixed. It is not incremented or decremented when a transfer is executed.
The IOARs are not initialized by a reset or in standby mode.
Rev. 7.00 Sep 21, 2005 page 204 of 878
REJ09B0259-0700
Bit
Initial value
Read/Write
I/O Address Registers (IOAR)
R/W
7
R/W
6
R/W
5
Source or destination address
Undetermined
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0