HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 399

IC H8 MCU FLASH 128K 100QFP

HD64F3048F16

Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of HD64F3048F16

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3048F16
Manufacturer:
RENESAS
Quantity:
1
Part Number:
HD64F3048F16
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3048F16
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD64F3048F16
Manufacturer:
RENESAS
Quantity:
20 000
Part Number:
HD64F3048F16V
Manufacturer:
SIEMENS
Quantity:
200
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS
Quantity:
3 477
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Clearing Procedure for Complementary PWM Mode: Figure 10.34 shows the steps to clear
complementary PWM mode.
Clear complementary PWM mode
Complementary PWM mode
Normal operating mode
Figure 10.34 Clearing Procedure for Complementary PWM Mode
Stop counter operation
1
2
1. Clear the CMD1 bit of TFCR to 0 to
2. After setting channels 3 and 4 to
Section 10 16-Bit Integrated Timer Unit (ITU)
set channels 3 and 4 to normal
operating mode.
normal operating mode, wait at least
one counter clock period, then clear
bits STR3 and STR4 of TSTR to 0 to
stop counter operation of TCNT3 and
TCNT4.
Rev. 7.00 Sep 21, 2005 page 373 of 878
REJ09B0259-0700

Related parts for HD64F3048F16