M30878FJAGP#U5 Renesas Electronics America, M30878FJAGP#U5 Datasheet - Page 127
M30878FJAGP#U5
Manufacturer Part Number
M30878FJAGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJAGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30878FJAGP#U5M30878FJAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 103 of 587
Table 9.9
Address Bus, Data Bus, CS0 to CS3, BHE
RD, WR, WRL, WRH
HLDA, BCLK
ALE
Ports
CLKOUT
XIN
XOUT
XCIN, XCOUT
9.5.3.2
9.5.3.3
Table 9.9 lists pin states in stop mode.
Stop mode is exited by the hardware reset 1, NMI interrupt, Vdet4 detection interrupt, or peripheral function
interrupts. The following are the peripheral function interrupts that can be used to exit stop mode.
When only the hardware reset 1, NMI interrupt, or Vdet4 detection interrupt is used to exit stop mode, set bits
ILVL2 to ILVL0 in the Interrupt Control Registers for all the peripheral function interrupts to 000b (interrupt
disabled) before setting the CM10 bit in the CM1 register to 1 (all clocks stop).
If the voltage applied to pins VCC1 and VCC2 drops below 3.0 V in stop mode, exit stop mode by the hardware
reset 1 after the voltage has satisfied the recommended operating conditions.
•
•
•
Key input interrupt
INT interrupt
Timer A and timer B interrupts
(Available when the timer counts external pulse having 100-Hz frequency or lower in event counter mode)
Pin States in Stop Mode
Pin States in Stop Mode
Exiting Stop Mode
When fC is selected
When f8, f32 are selected
Pin
Maintain the state immediately
before entering stop mode
“H”
“H”
“H”
Maintain the state immediately before entering stop mode
“H”
The clock is stopped and holds the level immediately before
entering stop mode
Placed in a high-impedance state
“H”
Placed in a high-impedance state
Memory Expansion Mode
Microprocessor Mode
9. Clock Generation Circuits
Single-Chip Mode
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