M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 111

• Manufacturer Part Number: M37632EFFP#U2
• Description: IC 740 MCU 80QFP
• Manufacturer: Renesas Electronics America

Specifications of M37632EFFP#U2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INSTRUCTIONS
3.4.3 Instructions Related to Subroutine Processing
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
Instructions Related to Interrupt Processing and Subroutine Processing
(4) Interrupt Control within Interrupt Routines
Normally, the JSR instruction is used to jump to a subroutine. When this instruction is
executed, the current program counter values, first PCH then PCL, are pushed onto the stack
automatically and the stack pointer is moved accordingly. However, in contrast to interrupt
handling, the contents of the processor status register are not saved automatically when a
subroutine is called. If it is necessary to save the contents of the processor status register,
execute the PHP instruction. Executing the JSR instruction does not alter the content of the
processor status register. Therefore, saving the contents of the processor status register using
the PHP instruction may be performed either immediately before the JSR instruction or
immediately after it (at the beginning of the subroutine). However, if such a stack operation
instruction is executed within a subroutine, do not fail to perform the opposite operation
before returning from (that is, within) the subroutine.
Execute the RTS instruction to return from a subroutine. When this instruction is executed,
the return address saved by the JSR instruction is returned to the program counter
automatically. Likewise in contrast to interrupt handling, the contents of the processor status
register are not restored. If the PHP or PHA instruction is used within a subroutine to store
the contents of the processor status register or accumulator, do not fail to perform the
opposite stack operation, using the PLP or PLA instruction, before returning from (that is,
within) the subroutine.
Figure 3.4.1 shows pushing and pulling values onto and from the stack during interrupt
handling and subroutine processing. Table 3.4.1 shows instructions for storing and retrieving
values in the accumulator and processor status register.
After an interrupt is accepted and execution of the interrupt routine begins, the interrupt
disable flag (I) is set to “1” automatically to prevent multiple interrupts. To enable multiple
interrupts, use the CLI instruction within the interrupt routine to clear the interrupt disable
flag (I) to “0”.
page 103 of 185