UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 332

• Manufacturer Part Number: UPD78F9200MA-CAC-A
• Description: MCU 8BIT 1KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9200MA-CAC-A

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 7
• Core Processor: 78K0S
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 1KB (1K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

330
A/D
converter
(
20x only)
Function
μ
PD78F9
Noise
countermeasures
ANI0/P20 to
ANI3/P23
Input
impedance of
ANI0 to ANI3
pins
Interrupt
request flag
(ADIF)
Conversion
results just after
A/D conversion
start
Details of
Function
To maintain the 10-bit resolution, attention must be paid to noise input to the V
pin and ANI0 to ANI3 pins.
<1> Connect a capacitor with a low equivalent resistance and a high frequency
<2> Because the effect increases in proportion to the output impedance of the
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to their
<4> The conversion accuracy can be improved by setting HALT mode
The analog input pins (ANI0 to ANI3) are also used as input port pins (P20 to
P23).
When A/D conversion is performed with any of ANI0 to ANI3 selected, do not
access P20 to P23 while conversion is in progress; otherwise the conversion
resolution may be degraded.
If a digital pulse is applied to the pins adjacent to the pins currently used for A/D
conversion, the expected value of the A/D conversion may not be obtained due to
coupling noise. Therefore, do not apply a pulse to the pins adjacent to the pin
undergoing A/D conversion.
In this A/D converter, the internal sampling capacitor is charged and sampling is
performed during sampling time.
Since only the leakage current flows other than during sampling and the current
for charging the capacitor also flows during sampling, the input impedance
fluctuates both during sampling and otherwise.
If the shortest conversion time of the reference voltage is used, to perform
sufficient sampling, it is recommended to make the output impedance of the
analog input source 1 kΩ or lower, or attach a capacitor of around 0.01
μ
When writing the flash memory on-board, supply a stabilized analog voltage to
the ANI2 and ANI3 pins, without attaching a capacitor. Because the
communication pulse may change and the communication may fail if a capacitor
is attached to remove noise.
The interrupt request flag (ADIF) is not cleared even if the analog input channel
specification register (ADS) is changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D
conversion result and ADIF for the pre-change analog input may be set just
before the ADS rewrite. Caution is therefore required since, at this time, when
ADIF is read immediately after the ADS rewrite, ADIF is set despite the fact A/D
conversion for the post-change analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D
conversion operation is resumed.
The first A/D conversion value immediately after A/D conversion starts may not
fall within the rating range if the ADCS bit is set to 1 within 1
bit was set to 1, or if the ADCS bit is set to 1 with the ADCE bit = 0. Take
measures such as polling the A/D conversion end interrupt request (INTAD) and
removing the first conversion result.
F to the ANI0 to ANI3 pins (see Figure 9-19).
analog input source, it is recommended that a capacitor be connected
externally, as shown in Figure 9-19, to reduce noise.
alternate functions during conversion.
immediately after the conversion starts.
response to the power supply.
APPENDIX D LIST OF CAUTIONS
User’s Manual U18172EJ3V0UD
Cautions
μ
s after the ADCE
μ
F to 0.1
DD
p. 173
p. 174
p. 174
p. 174
p. 174
p. 175
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